1. Field of the Invention
This invention relates to an interconnection structure for image arrays and more particularly to an interconnection structure for a mercury cadmium telluride image array interconnected to a silicon signal processor.
2. Description of Prior Art
Current methods for connection of mercury cadmium telluride focal plane arrays to a silicon signal processor chip include bonding of gold wire to an indium pad on a zinc sulfide layer on the detector array to a pad on a chip carrier which contains the silicon processor chip, and then bonding a gold wire from a pad on the processor chip to the pad already containing the wire from the detector array. This method of interconnection has significant disadvantages such as the large number of connections that need to be made. In addition, ball bonding on the zinc sulfide insulator is very delicate and can cause leaky electrodes if not done properly. Bonding on the indium over zinc sulfide requires a low temperature capillary which is used with light pressure, whereas the bonding on metal over ceramic requires a higher temperature and more pressure at closer tolerances. Due to these problems, the yield and reliability of the devices in combination is not high.
Methods for fabricating such imaging array devices are described in U.S. Pat. No. 4,231,149 entitled Narrow Band Gap Semiconductor CCD Imaging Device and Method of Fabrication assigned to Texas Instruments. This patent describes the fabrication of the image array itself.
It is the object of present invention to provide a method for interconnecting a focal plane array without the use of metal wire. It is another object of the present invention to provide a structure including a focal plane array located above a signal processor.